Domestic EDA technology pioneer | PFTN semiconductor

The traditional separation between chip design and manufacturing technology development has become increasingly difficult in advanced technology nodes.

Design technology co-optimization (DTCO) is the paradigm in advanced technology development which enables the exploration of technology design space for the optimal architecture that balances competing objectives of performance, power, area, cost and yield at product level.

For more information on the tools and methodologies for DTCO in various technologies, please follow the following links.

• DTCO in logic technologies

Reliability concerns used to be an afterthought in semiconductors. However, this approach is no longer viable, with the rapid rise of IC usage in industrial, automotive and aerospace systems, which expose the chips to more extreme environment and stressors, including wider temperature range and rapid temperature cycling, sustained high voltage and high current, voltage and current surges and ionizing radiation.

We provide tools and services for taking reliability into account during technology development and design. Follow the links below to find out more details.

• Soft-error: mechanism and design mitigation
• Single Event Catastrophic Failure of Power Devices
• FinFET Single Event Effects
• Total Ionizing Dose Effect